1. Field of the Invention
The present invention relates to an active device array substrate. More particularly, the present invention relates to an active device array substrate having an electrostatic discharge (ESD) protection capability.
2. Description of Related Art
In the fabrication of liquid crystal displays, operators, machines, or testing instruments are prone to carry electrostatic charges. When the above charge-carrying entities (operators, machines, or testing instruments) come into contact with a liquid crystal display panel, the devices and circuits inside the liquid crystal display panel may be damaged by ESD. Therefore, ESD protection circuits are usually designed in the peripheral circuit region of the liquid crystal display panel. For active matrix liquid crystal display panels, the ESD protection circuits are generally formed on the substrate during the fabrication of the active device arrays, and the active device arrays are electrically connected to the ESD protection circuits. As such, when the liquid crystal display panel is impacted by ESD, the ESD protection circuits may dissipate or alleviate the electrostatic charges, so as to prevent the electrostatic charges from directly impacting the devices and circuits inside a display region.
FIG. 1A illustrates a schematic view of a conventional active device array substrate. Referring to FIG. 1A, an active device array substrate 110 has a display region A and a peripheral circuit region B. The active device array substrate 110 mainly comprises a substrate 112, a plurality of scan lines 114, a plurality of data lines 116, a plurality of pixel units 118, a shorting bar 120, a plurality of ESD protection circuits 122, and a plurality of pads 124. The scan lines 114 and the data lines 116 are disposed on the substrate 112, and the pixel units 118 are disposed in the display region A. Specifically, the scan lines 114 and the data lines 116 are electrically connected to the pixel units 118 so that voltage signals can be transmitted to the pixel units 118 through the scan lines 114 and the data lines 116. In addition, the scan lines 114 and the data lines 116 are electrically connected to the corresponding pads 124.
As shown in FIG. 1A, the shorting bar 120 is disposed in the peripheral circuit region B, and electrically connected to one end of the ESD protection circuit 122. The other end of the ESD protection circuit 122 is electrically connected to the corresponding scan line 114 and data line 116. Specifically, when ESD phenomenon occurs on the substrate 112, the electrostatic charges are dispersed through the shorting bar 120 to avoid the accumulation of the electrostatic charges. In another aspect, the ESD protection circuit 122 consumes the energy of the electrostatic charges to alleviate the ESD impact.
FIG. 1B illustrates a schematic view of an ESD protection circuit disclosed in Taiwan Patent No. TWI268597. Referring to FIG. 1B, an ESD protection circuit 200 is electrically connected to a signal line 210 and a shorting bar 220. The ESD protection circuit 200 comprises a first active device T1, a second active device T2, a third active device T3, a fourth active device T4, a fifth active device T5, and a sixth active device T6, wherein each of the active devices T1, T2, T3, T4, T5, and T6 has a corresponding gate G, a corresponding source S, and a corresponding drain D. As shown in FIG. 1B, the first active device T1, the second active device T2, and the third active device T3 constitutes a positive electrostatic protection module 230, while the fourth active device T4, the fifth active device T5, and the sixth active device T6 constitutes a negative electrostatic protection module 240. When ESD phenomenon occurs, a bi-directional dispersion of the electrostatic charges is achieved through the positive electrostatic protection module 230 or the negative electrostatic protection module 240 to avoid the accumulation of electrostatic charges. In another aspect, the ESD protection circuit 200 consumes the energy of the electrostatic charges to alleviate the ESD impact.
FIG. 1C illustrates a schematic view of another conventional ESD protection circuit. Referring to FIG. 1C, an ESD protection circuit 250 is electrically connected to a signal line 260 and a shorting bar 270. The ESD protection circuit 250 comprises a first active device T1 and a second active device T2, wherein each of the active devices T1 and T2 has a corresponding gate G, a corresponding source S, and a corresponding drain D. As shown in FIG. 1C, the first active device T1 is a positive electrostatic protection module 280, and the second active device T2 is a negative electrostatic protection module 290. When ESD phenomenon occurs, a bi-directional dispersion of the electrostatic charges is achieved through the positive electrostatic protection module 280 or the negative electrostatic protection module 290 to avoid the accumulation of electrostatic charges. In another aspect, the ESD protection circuit 250 consumes the energy of the electrostatic charges to alleviate the ESD impact.
However, in general, the amount of the electrostatic conduction current of the ESD protection circuit is significantly affected by the width to length ratio (W/L) of the active devices as in the case of the ESD protection circuit 200 or the ESD protection circuit 250 described above. Therefore, in practice, the width to length ratio of the active devices is usually increased to enhance the protection capability of the ESD protection circuit. As the electrostatic conduction current of the ESD protection circuit increases the efficiency of the electrostatic dispersion improved. It should be noted that increasing the width to length ratio of the active devices increases the amount of current of the electrostatic conduction current, which, however, would occupy a larger circuit layout area and thus limit the layout space for other circuits on the active device array substrate. In another aspect, under the low voltage in normal operations, the larger the width to length ratio of the active devices is, the higher the leakage current of the ESD protection circuit is. As a result, the normal display of the liquid crystal display panels is affected.